May , 2006

TCAD Simulation of CompoundSemiconductor Electronic Devices

Presenter Name

Olin Hartin, Ph.D.

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006.

Objective of Workshop

This workshop will begin with a review of the fundamentals of TCAD simulation and available tools. DC and small signal AC simulation of devices will be discussed in detail. There will be a focus on calibration and the meaning of that calibration. The fundamentals of heterostructure simulation will be presented with examples.

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Objective of TCAD simulation

What can TCAD do
Provide a technical best prediction of DC, AC and transient performance
Worst kind of TCAD problem
“I saw something funny in the data, run some simulations and tell me what’s causing it”
In TCAD simulation is a prediction based on physics and geometry
  • Predictions are limited to data supplied and physical mechanisms included
  • When some of the key mechanisms are not well understood …
  • There are often clever ways to make predictions when some of the mechanisms are unavailable or when key parameters are unknown, but not always

When TCAD is used to solve a problem the most critical step is to demonstrate the problem in TCAD

If you can’t simulate the problem, it may be difficult to use TCAD to find the problem or simulate the solution

Objective of TCAD simulation

The objective of TCAD is to leverage prediction to solve problems that lead to better technologies

Since prediction is the objective then it is important to understand the concept of prediction

ƒ Compact models are fit to a training data set, they can then predict the performance of a device ~within the range of the training data set

ƒ TCAD is calibrated to a dataset,

Predictions are then based on a physical description of the gridded device and physical mechanisms applied at those grid points
We can presume that the TCAD solution can be used to do prediction outside the range of the calibration data set, but
The farther we get away from that calibration data the more risky the prediction
This is because there are approximations in the formulation and the calibration eliminates the offset associated with these approximations locally

Outline of Workshop

Vendor review

Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

TCAD Tools

Major tool TCAD tool vendors

Sentaurus ƒ A typical simulation would have these elements

S-Process (Floops) -> S-Edit (Devise)-> S-Device (Dessis)

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow

Process simulation

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Process simulation

What do these tools do?

Process

ƒ As closely as is reasonable fabricate the device in simulation

In Silicon simulation process is the challenge, in compound semiconductors the greater challenge is typically in the device simulation

ƒ Retain as many details as possible

That makes it possible for you to use simulation to create spits on those process steps

ƒ The tools are designed mostly for silicon simulation so there are compromises

Process simulation

There are two potential objectives of process simulation

1. Investigate the process, and itsvariability using process simulation for development, (this is common in development

of Silicon devices, not so much in development of compound semiconductor devices)

2. Build a structure that accurately describes a device for device simulation, this is more common in compound semiconductors, this can be done in three ways

  1. A full process simulator (Athena or S-Process)
  2. By importing some measured profiles into a structure
  3. By using an edit program to draw the device and then drop in measured or conceptually determined profiles (Devedit, or S-Edit)

Process simulation

Process simulation emulates actual fabrication
There are commands to deposit layers, define doping, createimplantation profiles, mask off, and etch layers
Each of these steps has a thermal budget where defined diffusionmechanisms are used
Movement of dopant species is described by these diffusion steps
In Heterostructure simulations elements diffuse across material boundaries creating new mixes of materials but this isn’t taken intoaccount in commercial simulators
For example at AlGaAs InGaAs boundary there is diffusion of Al, In, Ga, As, these diffusions are typically small and the impact of a thin InAlGaAs interface material between the AlGaAs InGaAs is not considered
Crystalagraphic etching isn’t typically taken into account either

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow

Process simulation

Gridding

Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Creating a grid

Edit

Remember the device is only described in the simulator at the grid points ƒ More grid points are not always good

The grid becomes stiffer

The simulation gets a lot slower ƒ You want the smallest number of grid points that is sufficient to describe the solution ƒ Your grid will be mechanism dependent ƒ If there are surface traps -decrease the vertical grid spacing at the surface to describe

the trap depletion

Gridding problems

There isn’t a fool proof analytical gridding algorithm for compound semiconductor devices that I am aware of

ƒ You may be able to run a simulation up to the point where convergence fails and then save the output

Plots of the internal characteristics of the device at this point may reveal the issues
There are ways to dump out the location of the largest update which helps in finding the problem, and which equation is not converging
Changes to the math, solver, or implementation of the physics may be tried
Solver, and math issues
Highly doped semiconductors
Grid adaptation is incompatible with heterostructures (AGM) (chapter 30)

Just remember, mistakes often show up as convergence problems

Gridding case study

Device: GaAs Gadolinium Gate Oxide FET
Models, hydrodynamic, and density gradients
Convergence is difficult in drain sweeps when there is very low current
  • Solutions ƒ Sweep the gate to turn on the channel before sweeping the drain ƒ Decrease lateral grid spacing – slower solution
  • Next step after getting good convergence ƒ Build a parallel study in which you increase the grid spacing in high grid

count regions ƒ A courser grid isn’t as stiff, and generally converges better overall ƒ Solution cutbacks occur when convergence fails

These cutbacks take more time than a large grid would take
Very small minimum cutbacks (where convergence would fail) are seldom the solution

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

How do you describe a device in Free space some materials system in a device simulator?
You describe the conduction (valence) band in terms of the electron affinity of each material
This allows the simulator to construct a model of conduction

charge

band discontinuities

Poisson is then used to determine the potential due to charge

Heterostructure TCAD

These two solutions are added together to give the vertical Epotential profile
As we will see this is described only at grid points
When there are quantum effects quantization impacts the charge profile and the resulting electric potential solution
Device
  • Ah, there’s the rub!
    • Device simulations ƒ Material parameters ƒ Mechanisms
      • Transport
      • Quantum
      • Recombination
      • Traps

ƒ Coupled equations are solved using a Newton’s method approach

The more effects included, the more equations, the more memory and the more time required

ƒ Transport mechanisms, Poisson,

Quantum – solve multiple eqns ƒ DC ƒ AC

Device Simulation

Drift diffusion, or Hydrodynamic drive Schroedinger solver, or Density Gradients

Fixed or Hydrogenic

Solve { Poisson Coupled {Poisson Electron} Quasistationary (Goal { Name="gate" Voltage=2 }) { Coupled {Poisson Electron} } }

ƒ Temperature Hydrodynamic – solution based on Boltsman ƒ Mixed mode

transport considering energy of carriers

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Convergence control

RefErrControl
RhsFactor maximum change to allow the same Jacobian to be used
ErrRef(electron)=1e7
ErrRef(hole)=1e7
Keep good records, change one thing at a time, maintain the ability to back up one step when you make it worse

Impatience is your enemy

< 1

Digits

ε R = 10

x

<ε

+ε Axε R

Transport Options

“I just want to get a quick answer, use drift diffusion”
What difference does it take how long it takes to get the wrong answer?
There are many opinions on drift versus hydrodynamic drive andmuch of that comes from Silicon experience
  • In some software there are issues with the high field saturation model in barrier materials when using drift diffusion in heterojunction devices
  • Hydrodynamic drive provides a solution to Boltzman transport equation (BTE) using the relaxation time assumption
  • Drift diffusion solves for the field at each point in a device and then determines current, impact ionization … from those fields, problem is they are really determined based on electron energy not the local field
  • Hydrodynamic drive/Energy balance approaches solve for electron energy

Velocity models

Mobility models
  • You can specify a mobility, a mole fraction dependent mobility
  • You can also specify a doping dependent mobility
Velocity models
There are two choices for velocity models for compound semiconductors
    1. A saturation model that looks a whole lot like silicon
    2. 1. This is vsat_formula = 2
  1. Energy dependent mobility model,
1. more complex, and harder to use
Relaxation times

There are two choices

      1.
      A constant relaxation time
    1. 1. This and a constant saturation velocity may lead to an unrealistic transport picture
    2.
    Energy dependent relaxation times

1. more complex, and harder to use

Velocity model

The high field velocity model for GaAs is shown in the blue curve
This model has negative differential mobility (NDM)
A saturated velocity model, similar to that seen in Silicon is shown in red
Typically this saturated velocity model is used instead of the NDM model because of complexity

Velocity (cm/sec)

2.5 .107

2 .107

1.5 .107

GaAs
a

  1. 1 .107
  2. 5 .106 0

0 5 101520

kV/cm

Negative differential mobility -energy dependent relaxation time model

Must include energy dependent 2

1.5

relaxation times

EDRT (ps)

1

2

0.5

0

1.5

0 1000 2000 3000 4000 5000

Electron Temperature (K)

2

1

Increasing

1.5

InGaAs mole

0.5

Relaxation time (ps)

EDRT (ps)

fraction

1

0

0 1000 2000 3000 4000 5000 Electron Temperature (K) 0.5

0 0 1000 2000 3000 4000 5000

Electron Temperature (K)

Energy relaxation rate

Energy relaxation rate

80

60

dW T T A )

n 3 nL 3

= kn + kTnRSRH ⎟λn + Eg (Gn Rndt 2 τ 2

en 40

wn w0

R = 20

τ

0

Electron Temperature (K)

Energy relaxation rate (x1e10)

Energy vs Field

GaAs, AlGaAs, and InGaAs

1 .103 1 .104 1 .105 1 .106

Electric Field (V/cm)

Trap types

based on changing bias conditions ƒ Acceptor and eNeutral traps

Uncharged when unoccupied and carry a charge of one electron when occupied ƒ Donor and hNeutral traps

Are uncharged when unoccupied and they carry the charge of one hole when fully occupied

Traps can be defined with different distributions of charge, the most common is Gaussian, but table input is also interesting

(EE0 )2 2E

s

n = N0e 2

N0 is the concentration, E0 is the center of the trap energy distribution,and Es is the sigma

Density Gradient Model

Density Gradient
Where n is the charge density
mis the effective mass

n

γ is a fit factor

Quantization model

In many structures quantized wells are used
This is particularly true of HEMT structures where charge is placed adjacent to the channel and the mobility of the channel is maintained
Due to quantization the charge in the channel does not look like it would under a semiclassical setting (shown in blue)
Schroedinger Poisson can be use to solve for this charge (shown in red)
The density gradient model can be used to give this same model

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage

ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Peak Electric Field

Peak Electric Field

Temperature Dependent Breakdown Calibration

This slide shows the calibration between simulated and measured 2 terminal breakdown current as a function of temperature from 25 to 150C The mechanisms are impact ionization and thermionic field emission

Tunneling and Impact Ionization

►This is an illustration of the proposed gate to drain breakdown mechanism. Here electrons tunnel in along the gate Electron Tunnelingdue to high reverse fields. Tunneling is

anticipated to occur for fields near 1e6

e

φΜ

V/cm[Robbins, 1988 #3].

Gate

Impact ionization occurs in AlGaAs and

InGaAs material below resulting in holes that escape to the gate, populate surface states altering channel depletion and degrading performance, and escape to the substrate.

E

Ec

h

Neither mechanism alone accounts for the current observed in measured data

Ev because the tunneling mechanism feeds carriers to the avalanche mechanism

PHEMT Structure

Impact Ionization Parameters

Impact ionization generation
GaAs
  1. 1 .108
  2. 1 .107

AlGaAs in 10% molefraction

1 .106

increments

  1. 1 .105
  2. 1 .104

InGaAs 20% molefraction

1 .103 100

10 1

0.1

1/Electric Field (cm/V)

Impact ionization Generation

alpha

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage

ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

How does it work?

Solver runs a coupled solve of several equations describing the problem
Each additional equation adds to the size of the problem and the solution time.
For a problem there are the number of grid points times the number of equations to be solved

Poisson : ∇⋅ε∇φ= q(p n + N N )−ρ

D A trap

dnContinuity : J = qR + q

n net

dt Drift Diffusion : J =−nqµΦ

n nn

td 3

Hydrodynamic : J = qµ(nE + kT n + f knT + nkT ln m )

nncn nn 2 nn

γ h22 n

Density Gradients : Λ= n 6mn n

LU decomposition of the Jacobian is typically done

J (x )(x x ) =−F(x )

Fn n+1 nn

x = x J (x )1 F(x )

n+1 nFn n

Outline of Workshop

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Examples

Electrode {

DC Solution

{ Name="Source" Voltage=0 Resistor=417} { Name="Drain" Voltage=0 Resistor=417} { Name="Gate" Voltage=0 WorkFunction=5.2 Resistor=300 }

{ Name="substrate" Voltage=0 schottky barrier=0.7 } }File {

Grid = "input/ggofet_mdr"

Doping = "input/ggofet_mdr"

Current = "d_ox/plot"

Output = "d_ox/log"

Plot = "d_ThuFeb15122658200719/dat"

Parameter = "../../common_files/specific.par" }Plot {

EtrappedCharge

Egapstatesrecombination

htrappedcharge

hgapstatesrecombination

Potential Electricfield

eDensity hDensity

eCurrent/Vector hCurrent/Vector

TotalCurrent/Vector

SRH Auger

eMobility hMobility

eQuasiFermi hQuasiFermi

eGradQuasiFermi hGradQuasiFermi

eEparallel hEparallel

eMobility hMobility

eVelocity hVelocity

DonorConcentration AcceptorcCncentration

Doping SpaceCharge

ConductionBand ValenceBand

BandGap Affinity

xMoleFraction

Note that electrodes are defined with resistor values that are scaled by the areafactor here it is 1000, so the actual source resistance implied Is 0.417

CNormPrint gives the maximum size of the update and the node that it occurs at for each equation solution
Fermi specifies Fermi statistics
eQuantumPotential is density gradients (a quantum correction particularly for describing the charge in the channel)
AreaFactor = 1000 is a 1 mm device

DC Solution

Math { CNormPrint Extrapolate Digits = 5 NotDamped=1000 Iterations=25 NewDiscretization ConstRefPot ElementEdgeCurrent Derivatives RelErrcontrol NUpperLimit=1e40 RhsFactor=1e20 CdensityMin=1e-10 ErrRef(electron)=1e8 ErrRef(hole) =1e8 DirectCurrent

}

Physics { Fermi eQuantumPotential HeteroInterfaces AreaFactor = 1000 Hydro(etemperature) Recombination( SRH Auger )

Describe the Physics

Here a mole fraction of 20% is given

InGaAs has a 30% mole fraction but as it is strictlydefined using the software thiswould be 70% Indium (we haveour own internal materials file which has the oppositespecification)

DC Solution

Physics ( Material = "AlGaAs" ) {MoleFraction(

XFraction=0.2 ) EffectiveIntrinsicDensity( Nobandgapnarrowing ) Traps(

(Acceptor Conc=1e14 EnergyMid=0.62 fromCondBand eXsection=1e-14 hXsection=2e-13) (Donor Conc=1e15 EnergyMid=0.61 fromValBand eXsection=2e-18 hXsection=2e-18)

) Mobility (

eHighFieldSaturation(CarrierTempDrive)hHighFieldSaturation(GradQuasiFermi) )}

Physics ( Material = "InGaAs" ) {EffectiveIntrinsicDensity( Nobandgapnarrowing )MoleFraction(

XFraction=0.3 ) Mobility (

eHighFieldSaturation(CarrierTempDrive)hHighFieldSaturation(GradQuasiFermi)

)}Physics ( MaterialInterface = "Oxide/GaAs" ) {

Traps(conc=-1e9 fixedcharge) }

Solve { DC Solution

Coupled(Iterations=50) { Poisson } Coupled(Iterations=50) { Poisson Electron Hole } Coupled(Iterations=50) { Poisson eQuantumPotential } Coupled(Iterations=50) { Poisson Electron Hole eTemperature eQuantumPotential }

Quasistationary ( InitialStep=2e-2 Minstep=1e-8 MaxStep=0.20 Increment=1.4 Goal { Name="Gate" Voltage=2 }

) { Coupled { Poisson Electron Hole eTemperature eQuantumPotential } currentplot ( time=(range=(0 1) intervals=40 ) )

}

Quasistationary ( InitialStep=5e-2 Minstep=1e-8 MaxStep=0.20 Increment=1.4 Goal { Name="Drain" Voltage=2.0 }

) { Coupled { Poisson Electron Hole eTemperature eQuantumPotential } currentplot ( time=(range=(0 1) intervals=5 ) )

}

Quasistationary ( InitialStep=5e-2 Minstep=1e-8 MaxStep=0.20 Increment=1.4 Goal { Name="Drain" Voltage=2.0 }

) { Coupled { Poisson Electron Hole eTemperature eQuantumPotential } currentplot ( time=(range=(0 1) intervals=5 ) )

} }

To get initial solution use coupled solutions with additional equations

Current plot gives solutions at predefined points

Sweep the gate, then the drain, then sweep the gate back to get cut off

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples
    Objectives of simulation
    HBT
    GaAs MOSFET
  • Switch transient simulation under mixed mode
  • Large signal
Mixed mode allows the user to do circuit simulation with ideal circuit elements and device simulation elements
This can be used for DC, AC, and for transient simulations
Describe each device and give them a name
  • Then in the system section describe a circuit
  • This may be simple or complex

Mixed Mode Simulation

Device FET1 {
Electrode {
{ name=“source” voltage=0 Res=200 }
{ name=“drain” voltage=0 Res=200 }
{ name=“gate” voltage=0 Res=200 }
{ name=“sub” voltage=0 Res=200 }
}
Physics {
}
Plot {
}
Math {
}
File {
}
System {

FET1 DEV ( drain=dt gate=gt source=st sub=st) v v_g(gt 0) {type=“dc” dc=0} v v_d(dt 0) {type=“dc” dc=0} v v_s(st 0) {type=“dc” dc=0}

}

Quasistationary (

InitialStep=1e-2 Minstep=1e-7 MaxStep=0.2 Increment=1.4

Goal { Parameter=v_g.dc Voltage= 2.0 } ) { Coupled { Poisson Electron Hole eTemperature eQuantumPotential } }

Quasistationary (

InitialStep=1e-2 Minstep=1e-7 MaxStep=0.2 Increment=1.4

Goal { Parameter=v_d.dc Voltage= 2 } ) { Coupled { Poisson Electron Hole eTemperature eQuantumPotential } }

Quasistationary (

InitialStep=1e-2 Minstep=1e-7 MaxStep=0.2 Increment=1.4

Goal { Parameter=v_g.dc Voltage= 0 }) { currentplot (time=(range=(0 1) intervals=40 ) )

ACCoupled ( StartFrequency=0.5e9 EndFrequency=20.0e9 NumberOfPoints=39 Linear

Node(gt dt) Exclude(v_d v_g)

ACCompute (time=(range=(0 1) intervals=40 ))

)

{ Poisson Electron Hole eTemperature eQuantumPotential }

}}

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
HBT/BJT
Examples
    Objectives of simulation
    HBT
    • GaAs MOSFET ƒ DC
    • Calibration ƒ AC
    • Small signal analysis
  • Switch transient simulation under mixed mode
  • Large signal

Calibration What does it mean?

First: Determine every parameter possible from measured data and from the literature

For the parameter values that cannot be determined determine the reasonable range

As a result the model is only valid in the range of the measured data it was fit to ƒ Physical device simulation uses a physical description of the device and mechanisms at grid points

A few parameters are set so that this fits a range of data
Simulation is predictive because of the basis in physics used beyond the range of the calibration data, this is unlike a model
Calibration procedure should not violate the physical description
It is important to us a good calibration procedure

Calibration to measured data FET Procedure

  1. Determine barrier height in the simulation by calibrating barrier height to fit measured gate current
  2. Set mobilities and contact resistance from measurements, you really want measured mobilities
  3. Adjust total charge to get the threshold voltage seen in measurements
    1. Set surface trap density/mobility to get sheet resistance seen in measured data
      1. You really want to use measured mobilities,
      2. if you do any adjustment to Rsh is in surface traps or sheet charge, you should have the sheet charge right under the channel if the threshold is right
  4. Adjust the saturation velocity to achieve the measured maximum current
  5. Add extrinsic inductance determined from small signal AC data
  6. When you are done the resistances in each region of the device should add up to the on resistance, this is a useful check and allows you to look for inconsistencies

Calibration to measured data HBT Procedure

  1. Compare gummels, your intrinsic diode parameters from simulation should be good
    1. Calibrate beta by emitter and collector resistance at high current and recombination at low current …
    2. Important parameter is bandgap narrowing
  2. Adjust surface traps to take into account lateral regions
    3.
    Consider impact of bulk traps
  1. Differences between two dimensional assumptions and 3 dimensional layout
Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples

Objectives of simulation

Examples: Objectives of TCAD

Good device physics and a good understanding of device design are required to get a lot out of simulation
These are some concepts that have been shown to be useful in the past
    • Fets ƒ Device doping is chosen by the tradeoff between current and breakdown ƒ Focus on device designs that show different trends in this tradeoff ƒ Remember FETs are impacted by surface effects, make sure you match the
    • sheet resistance of the device in all regions
  • HBTs ƒ Bulk parameters are more important ƒ Fitting Gummels and beta curves typically involves some adjustment of

recombination parameters including band gap narrowing ƒ Surface effects are important near contacts

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples

Objectives of simulation

Example HBT

HBT’s are described using similar methods as in other devices
Vertical grid spacing is typically decreased in junction regions

and lateral grid spacing is typically decreased around lateral device discontinuities such as contacts and etches

emitter

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples
    Objectives of simulation
    HBT
    • GaAs MOSFET ƒ DC
    • Calibration ƒ AC
    • Small signal analysis
  • Switch transient simulation under mixed mode
  • Large signal

Example GaAs MOSFET

The device as a Gadolinium GaAs Oxide layer under the gate, it employs delta doping and a InGaAs Channel

GaAs Oxide (κ=20)
2 nm undoped Al45GaAs
2 nm undoped GaAs
10 nm undoped In30GaAs
2 nm undoped GaAs
3 nm undoped Al30GaAs
65 nm undoped Al30GaAs
0.2 µm undoped GaAs
GaAs Substrate

Example GaAs MOSFET

Vertical grid must be small in the active region from the surface past the channel
Gate voltage sweep convergence is impacted by the vertical grid
Key points are the surface, channel, delta doping, and barrier region
Lateral gridding is needed at the edge of lateral discontinuities in the structure, such as the gate edges, source and drain edges
Recesses also create lateral discontinuities
Drain voltage sweep convergence is impacted by the lateral grid
The activation of charge is adjusted to about 0.65 (out of 1.0) to get the threshold seen in the measured data

Threshold of ~0.25 volts is achieved

Simulated and Meausred: Id/Vg Characteristics

Drain Current vs Gate Voltage

Gate Voltage (V)

Log(Id)/Vg characteristic shows

log Drain Current vs Drain Voltage

1000

the sub-threshold swing (s) of 100 [mv/dec]

100
10
1
0.1 0. 00 0.50 1.00 1.50 2.00
0.01
0.001 ID (mA/mm)
0.0001 sim Id/Vd

Gate Voltage (V)

Simulated vs Measured Id/Vd Characteristic

Set saturation velocity to 1.3e7 cm/sec

This is not completely

Drain Current vs Drain Voltage

physical 450

Set the effective contact

resistance to achieve the

same on resistance

observed in the device

This usually has to do with

access resistance which is

Drain Current (mA/mm)

400 350

300

250 200

150

100

50

0

not typically accurately

-50

measured

In this case the access resistance used in the simulation was ~.6 ohm mm

Comparison to measured data

Comparison of some of the device characteristics to measured data
Differences in Rc suggest
  • The meas Rc is bad, or
  • The sim has lower Rch

Check R= 2*R+ 0.85*2*Rsh + L*Rch 2.25

onc g

par Simulation Measured Error Units
Vth 0.254 0.25-0.27 on volts
Ron 2.23 2.25 0.9% ohm mm
S 100 106 6% mv/dec
Idss 427 435-421 >2% mA
Rsh 461 449 2.6% mA
Rc 0.617 0.417 47% ohm mm
Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples
  • Objectives of simulation
  • HBT
  • GaAs MOSFET ƒ DC

Calibration

ƒ AC

Small signal analysis

AC characteristics

The “intrinsic” device in the inner box is
simulated using TCAD but this is not exactly what is built in the laboratory
The external box contains the extrinsics seen there
In order to assess the AC characteristics the extrinsic parasitics must be considered/added
The output of simulator is conductance and acceptance at the ports, which can be converted to y, z or s
To add extrinsics convert TCAD results to z parameters and add

R_ g + L_ g⋅ω⋅1i +(R_ s + L_ s⋅ω⋅1i)(R_ s + L_ s⋅ω⋅1i)⎢⎥

(R_ s + L_ s⋅ω⋅1i) R_ d + L_ d⋅ω⋅1i +(R_ s + L_ s⋅ω⋅1i)

S parameters

S parameters that result, both intrinsic and extrinsic s

G+iA Z

Sintrinisic

parameters are shown

90 Z+Ze Sextrinsic

270

GridZ s11

Small Signal Gain

30

Add gate resistance

25

Gate inductance Load inductance 20

Impact of these parasitics 15 is, Fmax is decreased from from ~200 to 20 GHz 10

Source inductance 5

0

S 21 /S 1 2
2 3 .5
Ma xi m u m
S ta b le
Ga in
TC AD
Ma xi mu m
Av ail ab le
Ga in
0

0.1 1 10 100 Frequency (GHz)

Maximum Practical Gain (dB)

You must have a good handle on parasitics to get the right answer

Impact of Source Inductance is to significantly reduce the corner frequency

30

which results in lower gain at

high frequency

In some cases the source inductance is not well known but can be set to achieve the

gain observed

Maximum Practical Gain (dB)

25

20

15

10

5

Frequency (GHz)

This is the impact of the gate resistance,
TCAD simulations typically don’t include the gate resistance 25
Increases in gate resistance

30

also impact the gain curve and

the location of the corner

frequency

Maximum Practical Gain (dB)

20

15 10 5

0

Frequency (GHz)

Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples
  • Objectives of simulation
  • HBT
  • GaAs MOSFET ƒ DC

Calibration

ƒ AC

Small signal analysis

PHEMT Switch Evaluation of Harmonics

PHEMT TCAD Calibration

SPDT Switch implemented to Measured Data with PHEMT multi gate switches

DC I/V

S param

Single Pole Double Throw Switch Simulation

System {*----------------------------------------------------------------------*

HEMT phemt (Source=s Drain=d Gate1=g1 Gate2=g2 Gate3=g3 )Plot "switch" (time() v(s) v(d) v(n2) i(s d) i(s n2) )

Vsource_pset vs ( vs 0 ) { sine =(0 1.25892541179417 1e9 0 0) } Resistor_pset Rin ( vs s ) { resistance = 50 } Resistor_pset RD ( s d ) { resistance = 16000 } Vsource_psetvc( vc0 ) { dc = 0 }

Resistor_pset Ron (s n2) { resistance = 2.35 } Resistor_pset RL_ (n2 0) { resistance = 50 } Resistor_pset RL (d 0) { resistance = 50 }

Resistor_pset RG1 (g1 vc) { resistance = 16000 } Resistor_pset RG2 (g2 vc) { resistance = 16000 } Resistor_pset RG3 (g3 vc) { resistance = 16000 }

*

* Switch circuit *----------------------------------------------------------------------* }

More complex mixed mode simulations can be done including ones with multiple active devices and ideal passive components, here a single pole double throw circuit is described In this case we are doing a single pole double throw simulation with a switch composed of two devices

On device
Off device looks like
Looks is modeled a resistor

Switch Simulation

Solve { *----------------------------------------------------------------------* *--Computing initial guess:

NewCurrentFile=off

circuit Coupled( Iterations=100 ){ Poisson Contact Circuit } Coupled { Poisson Contact Circuit Electron Hole eTemperature }

Quasistationary ( InitialStep=1e-2 Increment=1.2 Minstep=1e-8 MaxStep=0.1 Goal{ parameter=vc.dc Value=-3 } )

{ Coupled { Poisson Contact Circuit Electron Hole eTemperature } }

NewCurrentFile=off_

Transient ( InitialTime=0 FinalTime=2e-9 InitialStep=3.90625e-12 MaxStep=3.90625e-12 MinStep=1e-17 Increment=1.2

)

{ Coupled { Poisson Contact Circuit Electron Hole eTemperature } CurrentPlot (

Time = ( Range=( 0.0 2e-9 ) intervals=512 ) ) } plot

Transient Simulations

This is the resulting device simulation showing the transient solution of the off state device
Vendor review
Objective of simulation
General simulation flow
  • Process simulation
  • Gridding
  • Device simulation ƒ Heterostructure simulation ƒ Convergence ƒ Transport options ƒ Trap models ƒ Stress ƒ Quantum correction ƒ Material properties ƒ Special topics

Gate leakage ƒ Solutions in TCAD ƒ DC Simulation syntax ƒ Mixed mode

Outline of Workshop

Calibration
Examples
  • Objectives of simulation
  • HBT
  • GaAs MOSFET ƒ DC

Calibration

ƒ AC

Small signal analysis

Large Signal

There are three ways to do large signal simulations using TCAD

  1. Use mixed mode to simulate transient response of RF circuits Simulations are long and difficult, not well integrated with designer problems
  2. Use integrated harmonic balance algorithm

Not operable for practical problems, long simulations, not well integrated with designs

3. Extract a model based on TCAD Limits to what the model is capable, well integrated with designer

75

20

Pout

20

60.3 62.3

50

Pout (dBm)

Gain (dB)

PAE (%)

10

10

15.84 16.76

22.26 22.54

58 59.2 60.4 61.6 62.8 64

25

Gain

PAE

PAE (%)

a

0

-30 -20

-10 0 1020

15 15.6 16.2 16.8 17.4 18

22 22.2 22.4 22.6 22.8 23

Low Power Gain (dB 0

0

Pout (dBm)

-10

-30 -20 -10 0 10 20

-30 -20 -10 0 10 20

Pin (dBm)

Pin (dBm)

Pin (dBm)

In Review

Heterostructure process and device simulation can be done using basic methods. Key mechanisms necessary for FETs and Bipolars are available in commercial vendor packages. Methods exist that make it possible to integrate known material data and calibration to measured data. These methods enable TCAD simulations for DC, small signal AC, and large signal prediction.

References

Hartin, O., et al. (2001). Compound Semiconductor Physical Device Simulation for Technology Development at Motorola. GaAs IC Symposium 23rd Annual Technical Digest:163-165 Li, P. H., et al. (2002). “An updated temperature-dependent breakdown coupling model including both impact ionization and tunneling mechanisms for AlGaAs/InGaAs HEMTs.” IEEE Transactions on Electron Devices 49(9): 1675-1678. Quay, R. (2001). Analysis and Simulation of High Electron Mobility Transistors. Electrical Engineering. Freiburg, Technischen Universität Wien Fakultät für Elektrotechnik und Informationstechnik. Klimeck, G., R. Lake, et al. (1996). Nemo: A General Purpose Quantum Device Simulator. Texas Instruments Research Colloquium, Dallas, TX. Sentaraus Manual version Y-2006.06 Silvaco Atlas Manual 5th Edition, 1997 Kalna, K., et al. (2007). “Monte Carlo Simulations of High-Performance Implant Free In0.3Ga0.7As Nano-MOSFETs for Low-Power CMOS Applications.” IEEE Transactions on Nanotechnology 6(1). Rajagopalan, et al. (2007). “1-ìm Enhancement Mode GaAs N-Channel MOSFETs With Transconductance Exceeding 250 mS/mm.” IEEE ELECTRON DEVICE LETTERS 28(2). Adachi, S., Ed. (1993). Properties of Aluminum Gallium Arsenide. EMIS Data Reviews Series. London, INSPEC, the Institution of Electrical Engineers. Adachi, S. (1994). GaAs and Related Materials: Bulk Semiconducting and Superlattice properties. London, World Scientific. Vendelin, G. D., A. M. Pavio, et al. (1990). Microwave Circuit Design. New York. Lundstrom, M. (1990). Fundamentals of Carrier Transport. Reading, Ma., Addison Wesley Publishing Co. Vogl, P. (1983). “A Semi-Empirical Tight-Binding Theory of the Electronic Structure of Semiconductors.” Journal of the Physical Chemistry of Solids 44(5): 365-378. Wolfe, C. M., J. Nick Holonyak, et al. (1989). Physical Properties of Semiconductors. Engelwood Cliffs, New Jersey, Prentice hall. Blakey, P. A., Ed. (2001). Technology Computer Aided Design. The RF Microwave Handbook. London, CRC Press.