2010 Workshop Information                 


CS MANTECH provides many opportunities for sharing technical knowledge and learning from one another in an interactive environment. 

Chair:  Drew Hanser,SRI International

7:30 AM Registration
8:30 AM Welcome and Introductions

Workshop Session 1

8:45 AM

Process Flow, Process Integration and Testing Overview
Ravi Ramanathan, Skyworks Solutions, Inc.


Workshop Session 2

9:45 AM

Substrates and Epitaxy in III-V Manufacturing
 Bob Yanka, RF Micro Devices

10:45 AM BREAK
  Workshop Session 3
11:00 AM

Front End of Line (FEOL) Device Processing
Shiban Tiku, Skyworks Solutions, Inc

12:00 PM LUNCH
  Workshop Session 4
1:00 PM

Device Processing in III-V Manufacturing:  Front-side Backend Processing
Jan Campbell from TriQuint Semiconductor


Workshop Session 5

2:00 PM

Device Processing in III-V Manufacturing: Backside Wafer Processing
Tim Whetten, Avago Technologies

  Workshop Session 6
3:15 PM

Wafer-Level Packaging and Wafer-Scale Assembly Technologies
Patty Chang-Chien, Northrop Grumman Aerospace Systems

Each year in conjunction with the technical program, CS MANTECH offers Monday workshops on topics of interest to the compound semiconductor community.  Past programs have offered tutorials on areas ranging from materials and processing, test and characterization, applications and market analysis, to engineering management and intellectual property rights.  These invited talks by industry and academic leaders offer a forum for in-depth presentations and instruction. 

This year’s theme is an Overview of Device Processing in III-V Manufacturing. CS MANTECH is pleased to offer a day of talks on this subject that will provide a start-to-finish overview of processing steps for manufacturing wafers and devices for RF applications. The workshop will start with a high-level comprehensive overview followed by five talks that will explore different areas of the manufacturing process in detail. The planned tutorials will provide a good overview for those just wanting to learn more, but will also provide sufficient breadth of topics and detail that even those in the field will learn something new. 

The workshops begin with a talk by Dr. Ravi Ramanathan from Skyworks Solutions, Inc. that provides a holistic overview of the III-V manufacturing process by taking us through a survey of the process flow, process integration, and testing steps used in device manufacturing. He will give a brief introduction to compound semiconductors and then discuss epitaxial materials and devices, general process flows, the role of technology development and manufacturing managers, and directions in which compound semiconductor manufacturing are headed.  Dr. Ramanathan has a Ph.D. from the University of Poonta in India and he is the Director of Engineering at Skyworks Solutions Inc, leading the technology development group where he is involved in the development of devices and processes based on III-V compound/heterostructure semiconductors. In the second talk, Robert Yanka of RFMD will discuss the initial stages of the manufacturing process.  His talk will focus on GaAs manufacturing from the production of substrates through characterization of finished epiwafers.  Epitaxial growth techniques will be described along with in-situ and ex-situ characterization methods.  The discussion will include a look into RFMD’s MBE operation, covering organization, wafer management, process control and process improvement.  Mr. Yanka has a M.S. in Physics from North Carolina State University and for the past ten years he has developed MBE growth processes for high volume manufacturing at RFMD, where he serves as the Manager of the MBE Development group.

The next two talks in the workshop focus on front-side processing of III-V device wafers.  Dr. Shiban Tiku of Skyworks Solutions, Inc. will explore Front End of Line (FEOL) Device Processing, discussing figures of merit for different device structures, desired process and design characteristics, and the FEOL process flow, including a close examination of the critical process steps of etching, passivation, and pre-gate surface preparation.  Dr. Tiku is the Manager of Yield and Process Integration at Skyworks and is responsible for Yield improvement of GaAs HBT devices in the areas of design, layout, wafer fabrication, back end processing and final packaged test.  He has a Ph.D. in Materials Science from the University of Southern California.  The fourth talk in the workshop will be a talk given by Dr. Jan Campbell from TriQuint Semiconductor that will focus on the backend of front-side epiwafer processing.

The last two talks will examine in detail the final stages of device processing.  The fifth talk by Dr. Tim Whetten of Avago Technologies will explore the objectives and methods of processing the backside of wafers. A generalized process flow will be presented along with requirements of unit processes and methods of achieving those requirements, including dimensional control, materials interactions, assembly expectations and reliability issues. Several different process flows with different levels of complexity will be considered. Dr. Whetten received his Ph.D. in Materials Science from Cornell University. He is currently a senior Manufacturing Development Scientist in the Wireless Semiconductor Division of Avago Technologies developing and integrating new back-half GaAs manufacturing techniques. The final talk from Dr. Patty Chang-Chien of Northrop Grumman Aerospace Systems will discuss Wafer-Level Packaging and Wafer-Scale Assembly (WSA)Technologies.  The talk will provide an overview of the wafer-level packaging and wafer-scale assembly technologies.  The talk will briefly discuss motivation and benefits of these technologies as well as commonly used methods to accomplish packaging at the wafer level.  Several demonstrations of this packaging technology, such as wafer-level packaged MMICs, and integrated RF front-end modules assembled by wafer-scale assembly, will be presented.  Dr. Chang-Chien is the section manager of the WSA section in Semiconductor Products Department, Microelectronics Center at Northrop Grumman Aerospace Systems. She has a Ph.D. in Electrical Engineering from the University of Michigan.


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